AT91SAM7S/src/timer.h File Reference

#include "board.h"


Defines
#define	TC_CLKS_MCK_DIV_2 0x0
	called TIMER_CLOCK1 in datasheet
#define	TC_CLKS_MCK_DIV_8 0x1
	called TIMER_CLOCK2 in datasheet
#define	TC_CLKS_MCK_DIV_32 0x2
	called TIMER_CLOCK3 in datasheet
#define	TC_CLKS_MCK_DIV_128 0x3
	called TIMER_CLOCK4 in datasheet
#define	TC_CLKS_MCK_DIV_1024 0x4
	called TIMER_CLOCK5 in datasheet
#define	TIMER_ID 12
	Timer used by ADC: Timer 0 (Timer 1 is 13, Timer 2 is 14).
#define	TC_MCK_DIV 0
	Select the ratio between master clock and the timer clock. According to this choice, you have to modify TIMER_VALUE definition below.
#define	TIMER_VALUE (MCK/(2*SAMPLING_FREQUENCY))
	You have to capture in this formula, 2, 8, 32, 128 or 1024 according to TC_MCK_DIV.
#define	PULSEWIDTH 5
	Pulse duration in term of Timer Clock Cycle(s).
Functions
void	AT91F_TC_Open (AT91PS_TC TC_pt, unsigned int Mode, unsigned int TimerId)
	Configure timer.
Variables
unsigned int	SAMPLING_FREQUENCY

Detailed Description

#define TIMER_ID 12

Timer used by ADC: Timer 0 (Timer 1 is 13, Timer 2 is 14).

Note:: Frequency Output Range vs. selected ration on Master Clock
Reminder: The master clock frequency is 47.9232 MHz on the AT91SAM7S
With Master clock /2 (TCCLKS = 0) we can switch between 365.625 Hz up to 23.9616 MHz
With Master clock /8 (TCCLKS = 1) we can switch between 91.40625 Hz up to 5.9904 MHz
With Master clock /32 (TCCLKS = 2) we can switch between 22.8515.. Hz up to 1.4976 MHz
With Master clock /128 (TCCLKS = 3) we can switch between 5.71289 Hz up to 374.4 kHz
With Master clock /1024 (TCCLKS = 4) we can switch between 0.71411... Hz up to 46800 Hz

Configure timer.

Parameters:

unsigned int SAMPLING_FREQUENCY

Selects the sampling frequency in hertz. This choice has to be in accordance with the selected Frequency Output Range defined by the TC_MCK_DIV ratio